Q43

An $8\text{KB}$ direct-mapped write-back cache is organized as multiple blocks, each size of $32\text{-bytes}$. The processor generates $32\text{-bit}$ addresses. The cache controller contains the tag information for each cache block comprising of the following. $1$ valid bit $1$ modified bit As many bits as the minimum needed to identify the memory block mapped in the cache. What is the total size of memory needed at the cache controller to store meta-data (tags) for the cache?