Q44

Consider a system with $2 \;\text{KB}$ direct mapped data cache with a block size of $64 \; \text{bytes}.$ The system has a physical address space of $64 \; \text{KB}$ and a word length of $16 \; \text{bits.}$ During the execution of a program, four data words $\text{P, Q, R,}$ and $\text{S}$ are accessed in that order $10$ times $\text{(i.e., PQRSPQRS}\dots).$ Hence, there are $40$ accesses to data cache altogether. Assume that the data cache is initially empty and no other data words are accessed by the program. The addresses of the first bytes of $\text{P, Q, R,}$ and $\text{S}$ are $\text{0xA248, 0xC28A, 0xCA8A,}$ and $\text{0xA262},$ respectively. For the execution of the above program, which of the following statements is/are $\text{TRUE}$ with respect to the data cache?