Q14

MSQ1 mark

Let $\text{WB}$ and $\text{WT}$ be two set associative cache organizations that use $\text{LRU}$ algorithm for cache block replacement. $\text{WB}$ is a write back cache and $\text{WT}$ is a write through cache. Which of the following statements is/are $\text{FALSE}?$

(A)

Each cache block in $\text{WB}$ and $\text{WT}$ has a dirty bit.

(B)

Every write hit in $\text{WB}$ leads to a data transfer from cache to main memory.

(C)

Eviction of a block from $\text{WT}$ will not lead to data transfer from cache to main memory.

(D)

A read miss in $\text{WB}$ will never lead to eviction of a dirty block from $\text{WB}.$

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