Q62

MCQ2 marks, −0.5

Consider the following circuit involving a positive edge triggered D FF.

Consider the following timing diagram. Let $A_{i}$ represents the logic level on the line $A$ in the $i$ -th clock period.

Let $A'$ represent the complement of $A$ . The correct output sequence on $Y$ over the clock periods $1$ through $5$ is:

(A)

$A_{0} A_{1} A_{1}' A_{3} A_{4}$

(B)

$A_{0} A_{1} A_{2}' A_{3} A_{4}$

(C)

$A_{1} A_{2} A_{2}' A_{3} A_{4}$

(D)

$A_{1} A_{2}' A_{3} A_{4} A_{5}'$

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