Q64

Consider the following program segment for a hypothetical CPU having three user registers $R_1, R_2$ and $R_3.$

$$\begin{array}{|l|l|c|} \hline \text{Instruction} & \text{Operation} & \text{Instruction size (in Words)} \\ \hline \text{MOV } R_1, 5000 & R_1 \leftarrow \text{Memory}[5000] & 2 \\ \hline \text{MOV } R_2, (R_1) & R_2 \leftarrow \text{Memory}[(R_1)] & 1 \\ \hline \text{ADD } R_2, R_3 & R_2 \leftarrow R_2 + R_3 & 1 \\ \hline \text{MOV } 6000, R_2 & \text{Memory}[6000] \leftarrow R_2 & 2 \\ \hline \text{Halt} & \text{Machine Halts} & 1 \\ \hline \end{array}$$

Let the clock cycles required for various operations be as follows:

$$\begin{array}{|l|l|} \hline \text {Register to/from memory transfer} & \text{3 clock cycles } \\\hline \text {ADD with both operands in register} & \text{1 clock cycles } \\\hline \text {Instruction fetch and decode} & \text{2 clock cycles }\\\hline \end{array}$$

The total number of clock cycles required to execute the program is