Q18

MCQ1 mark, −0.25

In an $SR$ latch made by cross-coupling two NAND gates, if both $S$ and $R$ inputs are set to $0$ , then it will result in

(A)

$Q = 0, Q' = 1$

(B)

$Q = 1, Q' = 0$

(C)

$Q = 1, Q' = 1$

(D)

Indeterminate states

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