Q27
MCQ2 marks, −0.67Consider a -bit saturating up/down counter that performs the saturating up count when the input is , and the saturating down count when is . The Next State table of the counter is as shown. The counter is built as a synchronous sequential circuit using D flip-flops. InputCureent StateNext State \text{P}$$\text{Q}_{1}$$\text{Q}_{0}$$\text{Q}_{1}^{+}$$\text{Q}_{0}^{+} 0$$0$$0$$0$$1 0$$0$$1$$1$$0 0$$1$$0$$1$$1 0$$1$$1$$1$$1 1$$0$$0$$0$$0 1$$0$$1$$0$$0 1$$1$$0$$0$$1 1$$1$$1$$1$$0 Which one of the following options corresponds to the expressions for the inputs of the D flip-flops, and ?
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