Q5

Consider a processor $\text{P}$ whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand. Which one of the following sequences of instructions corresponds to the high-level language statement $\mathrm{Z}=\mathrm{X}+\mathrm{Y}$ ? Note: X, Y, and Z are memory operands. R$0$, R$1$, and R$2$ are registers.