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Q1

MCQ1 mark, −0.33

Consider a computer with a 4MHz4 \mathrm{MHz} processor. Its DMA\text{DMA} controller can transfer 88 bytes in 11 cycle from a device to main memory through cycle stealing at regular intervals. Which one of the following is the data transfer rate (in bits per second) of the DMA\text{DMA} controller if 1%1 \% of the processor cycles are used for DMA\text{DMA}?

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