GATEverse
← GATE CSE 1990

Q8a

NATMarks unknown

A single bus CPU consists of four general purpose register, namely, R0,…,R3,ALU,MAR,MDR,PC,SPR0, \ldots, R3, \text{ALU}, \text{MAR}, \text{MDR}, \text{PC}, \text{SP} and IR\text{IR} (Instruction Register). Assuming suitable microinstructions, write a microroutine for the instruction, ADD R0,R1\text{ADD }R0, R1.

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