Q3-i

MCQMarks unknown

Choose the correct alternatives (More than one may be correct). Two NAND gates having open collector outputs are tied together as shown in below figure.

The logic function $Y,$ implemented by the circuit is,

(A)

$Y=ABC + DE$

(B)

$Y=\overline{ABC + DE}$

(C)

$Y=ABC.DE$

(D)

$Y=\overline{ABC.DE}$

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