Q20

MSQ1 mark

Consider a $5$ -stage pipelined processor with Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB) stages. Which of the following statements about forwarding is/are CORRECT?

(A)

In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction

(B)

In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction

(C)

Forwarding cannot prevent all pipeline stalls

(D)

Forwarding does not require any extra hardware to retrieve the data from the pipeline stages

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