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← GATE CSE 2014 Set 3

Q9

MCQ1 mark, −0.33

Consider the following processors (ns stands for nanoseconds). Assume that the pipeline registers have zero latency. P1:\text{P1:} Four-stage pipeline with stage latencies 1 ns, 2 ns, 2 ns, 1 ns\text{1 ns, 2 ns, 2 ns, 1 ns}. P2:\text{P2:} Four-stage pipeline with stage latencies 1 ns, 1.5 ns, 1.5 ns, 1.5 ns\text{1 ns, 1.5 ns, 1.5 ns, 1.5 ns}. P3:\text{P3:} Five-stage pipeline with stage latencies 0.5 ns, 1 ns, 1 ns, 0.6 ns, 1 ns\text{0.5 ns, 1 ns, 1 ns, 0.6 ns, 1 ns}. P4:\text{P4:} Five-stage pipeline with stage latencies 0.5 ns, 0.5 ns, 1 ns, 1 ns, 1.1 ns\text{0.5 ns, 0.5 ns, 1 ns, 1 ns, 1.1 ns}. Which processor has the highest peak clock frequency?

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