Q44

A $\text{1-input}$, $\text{2-output}$ synchronous sequential circuit behaves as follows: Let $z_k, n_k$ denote the number of $0’s$ and $1’s$ respectively in initial $k$ bits of the input $(z_k+n_k=k)$. The circuit outputs $00$ until one of the following conditions holds. $z_k-n_k=2$. In this case, the output at the k-th and all subsequent clock ticks is $10$. $n_k-z_k=2$. In this case, the output at the k-th and all subsequent clock ticks is $01$. What is the minimum number of states required in the state transition graph of the above circuit?