GATEverse
← GATE CSE 1991

Q6,b

NATMarks unknown

Design a 10241024 bit serial-in/serial-out unidirectional shift register using a 1K×11K\times 1 bit RAM with a data input DinD_{in}, data output DoutD_{out} and control input READ/WRITE‾\text{READ}/\overline{\text{WRITE}}. You may assume the availability of standard SSI and MSI components such as gates, registers and counters.

Sign in to save attempts.

Loading…