Q13-a

The below figure shows four $\text{D}$-type flip-flops connected as a shift register using a $\text{XOR}$ gate. The initial state and three subsequent states for three clock pulses are also given.

$$\begin{array}{|l|c|c|c|c|} \hline \text{State} & Q_{A} & Q_{B} & Q_{C} & Q_{D} \\\hline \text{Initial} & 1 & 1 & 1 & 1 \\ \text{After the first clock} & 0 & 1 & 1 & 1 \\ \text{After the second clock} & 0 & 0 & 1 & 1 \\ \text{After the third clock} & 0 & 0 & 0 & 1 \\\hline \end{array}$$

The state $Q_{A} Q_{B} Q_{C} Q_{D}$ after the fourth clock pulse is