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Q2.2

MCQ2 marks, −0.5

Consider the following multiplexer where I0,I1,I2,I3I0, I1, I2, I3 are four data input lines selected by two address line combinations A1A0=00,01,10,11A1A0=00,01,10,11 respectively and ff is the output of the multiplexor. EN is the Enable input.

Figure 1

The function f(x,y,z)f(x,y,z) implemented by the above circuit is

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