Q6a

MCQMarks unknown

A certain computer system was designed with cache memory of size $1$ Kbytes and main memory size of $256$ Kbytes. The cache implementation was fully associative cache with $4$ bytes per block. The CPU memory data path was $16$ bits and the memory was $2-$ way interleaved. Each memory read request presents two $16-$ bit words. A program with the model shown below was run to evaluate the cache design.

Answer the following questions:

(A)

What is the hit ratio?

(B)

Suggest a change in the program size of model to improve the hit ratio significantly.

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